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3.1.8.1
Reserved Bits (Reserved)
Bits 7 through 6 of the ARMCFGX and ARMCFGY registers are reserved. A write to the reserved bits must always be logic ’0’
for normal device operation and performance.
3.1.8.2
Arming Pulse Stretch (APS_X[1:0], APS_Y[1:0])
The APS_X[1:0] and APS_Y[1:0] bits set the programmable pulse stretch time for the arming outputs. Refer to Section 3.8.9
for more details regarding the arming function.
Table 13. Arming Pulse Stretch Definitions
APS_X[1], APS_Y[1]
0
0
1
1
APS_X[0], APS_Y[0]
0
1
0
1
Pulse Stretch Time (1) (Typical Oscillator)
0 mS
16.256 ms - 16.384 ms
65.408 ms - 65.536 ms
261.888 ms - 262.016 ms
1.Pulse stretch times are derived from the internal oscillator, so the tolerance on this oscillator applies.
3.1.8.3
Arming Window Size (AWS_Xx[1:0], AWS_Yx[1:0])
The AWS_Xx[1:0] and AWS_Yx[1:0] bits have a different function depending on the state of the A_CFG bits in the DEVCFG
register.
If the arming function is set to moving average mode, the AWS bits set the number of acceleration samples used for the arming
function moving average. The number of samples is set independently for each axis and polarity. If the arming function is set to
count mode, the AWS bits set the sample count limit for the arming function. The sample count limit is set independently for each
axis.
Refer to Section 3.8.9 for more details regarding the arming function.
Table 14. X-Axis Positive Arming Window Size Definitions (Moving Average Mode)
AWS_XP[1]
0
0
1
1
AWS_XP[0]
0
1
0
1
X-Axis Positive Window Size
2
4
8
16
Table 15. X-Axis Negative Arming Window Size Definitions (Moving Average Mode)
AWS_XN[1]
0
0
1
1
AWS_XN[0]
0
1
0
1
X-Axis Negative Window Size
2
4
8
16
Table 16. Y-Axis Positive Arming Window Size Definitions (Moving Average Mode)
AWS_YP[1]
0
0
1
1
AWS_YP[0]
0
1
0
1
Y-Axis Positive Window Size
2
4
8
16
MMA68xx
Sensors
Freescale Semiconductor, Inc.
17
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